Field Effect Transistor (FET)

FIELD EFFECT TRANSISTOR

The FET is a device in which the flow of current through the conducting region is controlled by an electric field, hence the name Field Effect Transistor (FET). As current conduction is only by majority carriers, FET is said to be a unipolar device.

Based on the construction, the FET can be classified into two types - Junction Field Effect Transistor (JFET) and Metal Oxide Semiconductor Field Effect Transistor (MOSFET).

JUNCTION FIELD EFFECT TRANSISTOR (JFET)

JFET is classified into two types, namely

(i) N-channel JFET with electrons as the majority carriers and

(ii) P-channel JFET with holes as the majority carriers.

CONSTRUCTION OF N-CHANNEL JFET

It consists of a N-type bar which is made of silicon ohmic contacts (terminals) made at the two ends of the bar, are called source and drain.

Source (S)

This terminal is connected to the negative pole of the battery. Electrons which are the majority carriers in the N-type bar enter the bar through this terminal.

Drain (D)

This terminal is connected to the positive pole of the battery. The majority carriers leave the bar through this terminal.

Gate (G)

Heavily doped P-type silicon is diffused on both sides of the N-type silicon bar by which PN junctions are formed. These layers are joined together and called Gate G.

Channel

The region BC of the N-type bar between the depletion region is called the channel. Majority carriers move from the source to drain when a potential difference V_DS is applied between the source and drain.

OPERATION OF N-CHANNEL JFET

When V_GS = 0 and V_DS = 0 when no voltage is applied between drain and source, and gate and source, the thickness of the depletion regions round the PN junction is uniform as shown in Fig. 1.46.

Case (i)

When V_DS = 0 and V_GS is decreased from zero. In this case, the PN junctions are reverse biased and hence the thickness of the depletion region increase. As V_GS is decreased from zero, the reverse bias voltage across the PN junction is increased and hence, the thickness of the depletion region in the channel until the two depletion regions make contact with each other. In this condition, the channel is said to be cut-off. The value of V_GS which is required to cut-off the channel is called the cut-off voltage V_C.

Case (ii)

When V_GS = 0 and V_DS increased from drain is positive with respect to the source with V_GS = 0.

Now the majority carriers (electrons) flow through the N-channel from source to drain. Therefore the conventional current I_D flows from drain to source. The magnitude of the current will depend on the following factors.

i. The number of majority carriers (electrons) available in the channel. i.e., the conductivity of the channel.

ii. The length L of the channel.

iii. The cross-sectional area A of the channel at B.

iv. The magnitude of the applied voltage V_DS. Thus the channel acts as a resistor of resistance R is given by

Where ρ is the resistivity of the channel. Because of the resistance of the channel and the applied voltage V_DS, there is a gradual increase of positive potential along the channel from source to drain. Thus the reverse voltage across the PN junctions increases and hence the thickness of the depletion regions also increases. Therefore, the channel is wedge shaped as shown in Fig. 1.47.

As V_DS is increased, the cross-sectional area of the channel will be reduced. At a certain value V_P of V_DS, the cross-sectional area at B becomes minimum. At this voltage, the channel is said to be pinched off and the drain voltage V_P is called the pinch-off voltage.

As a result of the decreasing cross-section of the channel with increase of VDs, the following results are obtained.

i. As V_DS is increased from zero, I_D increases along OP, and the rate of increase of I_D with V_DS decreases as shown in Fig. 1.48. The region from V_DS = 0 V to V_DS = V_P is called the ohmic region. In the channel ohmic region the drain to source resistance V_DS/I_D is related to the gate voltage V_GS in an almost linear manner. This is useful as a voltage variable resistor (VVR) or voltage dependent resistor (VDR).

ii. When V_DS = V_P, I_D becomes maximum, when V_DS is increased beyond V_P, the length of the pinch-off or saturation region increases. Hence there is no further increase of I_D.

iii. At a certain voltage corresponding to the point B, I_D suddenly increases. This effect is due to the Avalanche multiplication of electrons caused by breaking of covalent bonds of Silicon atoms in the depletion region between the gate and the drain. The drain voltage at which the breakdown occurs is denoted by B V_DGO. The variation of I_D with V_DS when V_GS = 0 is shown in Fig. 1.48, by the curve OPBC.

Case (iii)

When V_GS is negative and V_DS is increased.

When the gate is maintained at a negative voltage less than the negative cut-off voltage, the reverse voltage across the junction is further increased. Hence for a negative value of V_GS the curve of I­_D versus V_DS is similar to that for V_GS = 0, but the values of V_P and B V_DGO are lower as shown in Fig. 1.48.

From the curves, it is seen that above the pinch-off voltage, at a constant value of V_DS, I_D increases with an increase of V_GS. Hence a JFET is suitable for use as a voltage amplifier, similar to a transistor amplifier.

It can be seen from the curve that for voltage V_DS = V_P, the drain current is not reduced to zero. If the drain current is reduced to be zero, the ohmic voltage drop along the channel should also be reduced to zero. Further the reverse biasing to the gate source PN junction essential for pinching off the channel would also be absent.

The drain current I_D is controlled by the electric field that extends into the channel due to reverse biased voltage applied to the gate hence, this device has been given the name Field Effect Transistor.

In a bar of P type semiconductor, the gate is formed due to N-type semiconductor. The working of the P-channel JFET will be similar to that of N channel JFET with proper alterations in the biasing circuits, in this case holes will be the current carriers instead of electrons.

The circuit symbols for N-channel and P-channel JFETs are shown in Fig.1.49. It should be noted that the direction of the arrow points in the direction of conventional current which would flow into gate if the PN junction was forward biased.

CHARACTERISTICS PARAMETERS OF THE JFET

In a JFET, the drain current I_D depends upon the drain voltage V_DS and the gate voltage V_GS. Any one of these variables may be fixed and the relation between the other two are determined. These relations are determined by the three parameters which are defined below.

i. Mutual Conductance (or) Transconductance, g_m

It is the slope of the transfer characteristic curves, and is defined by

It is the ratio of a small change in the drain current to the corresponding small change in the gate voltage at a constant drain voltage. The change in I_D and V_GS should be taken on the straight part of the transfer characteristics. It has the unit of conductance in mho.

ii. Drain resistance, r_d

It is the reciprocal of the slope of the drain characteristics and is defined by

It is the ratio of a small change in the drain voltage to the corresponding small change in the drain current at a constant gate voltage. It has the unit of resistance in ohms.

The drain resistance at V_GS = 0 V, i.e., when the depletion regions of the channel are absent, is called as drain-source ON resistance, represented as R_DS or R_DS (ON). The reciprocal of the r_d is called the drain conductance. It is denoted by g_d or g_os.

iii. Amplification Factor, μ

It is denoted by

It is the ratio of a small change in the drain voltage to the corresponding small change in the gate voltage at a constant drain current. Here the negative sign shows that when V_GS is increased, V_DS must be decreased for I_D to remain constant.

(iv) Relationship Among FET parameters

As I_D depends on V_DS and V_GS the functional equation can be expressed as

If the drain voltage is changed by a small amount from V_DS to (V_DS + ∆ V_DS) and the gate voltage is changed by a small amount from V_GS to (V_GS + ∆ V_GS). Then the corresponding small change in I_D may be obtained by applying Taylor's theorem with neglecting higher order terms. Thus the small change ∆ I_D is given by

Dividing both the sides of this equation by ∆ V_GS, we obtain

substituting the values of the partial differential coefficients, we get

Therefore, amplification factor (µ) is the product of drain resistance (r_d) and transconductance (g_m).

(v) Power Dissipation, P_D

The FET's continuous power dissipation P_D is the product of I_D and V_DS·

Application of FET

1. FET is used as a buffer in measuring instruments receivers since it has high input impedance and low output impedance.

2. FETs are used in RF amplifiers in FM tuners and communication equipment for the low noise level.

3. Since the input capacitance is low, FETs are used in cascade amplifiers in measuring and list equipments.

4. Since the device is voltage controlled, it is used as a voltage variable resistor in operational amplifiers and tone controls.